Often during the process of developing circuits it is necessary to collect data in order to perform analysis of the circuit and its operation. This is required for a number of reasons including, but not limited to (a) when the circuit does not perform as expected, (b) to determine the performance limits of the circuit, and (c) to enable the optimization of the circuit.
For circuits implemented as integrated circuits, and for those implemented using programmable logic devices, additional circuitry may be added to the original circuit before implementation to collect data, process it and transfer it off the integrated circuit or programmable logic device for analysis. In the present specification the additional circuits are referred to as “instruments” and the process of adding them to an existing circuit is referred to as “instrumentation”. In the present specification the circuit before the addition of instruments is referred to as the “original circuit” and the points in the original circuit connected to the instruments are referred to as “debug nodes”. In the present specification “implementation” is the process of realizing a circuit from an abstract definition of desired behaviour. Further, software may be used to process, analyze and display the data from these instruments. This software is referred to in the present specification as “debug software”.
The primary challenge of this approach to data collection is that the number of debug nodes that require instrumentation in the original circuit may be large. Furthermore, adding additional circuits for instrumentation may affect the cost and reduce the performance of the circuit. Therefore, the size and impact of the circuits used as instruments needs to be minimized. In addition, the physical pins available on the device and their maximum operating frequency limit the bandwidth available to transfer data off the integrated circuit or programmable logic device. Finally, adding or modifying instruments to observe new debug nodes or combinations of debug nodes in the original design is difficult and time consuming for circuits implemented in both integrated circuits and programmable logic devices and furthermore is very expensive in integrated circuits.
To manage these challenges, existing approaches typically either limit the total number of debug nodes that may be instrumented, or require that users decide, in advance, all of the potential combinations of debug nodes that will require observation to fully understand the operation of the original circuit. The result is that existing prior art approaches tend to be time-consuming, inefficient and costly.